1. Field of the Invention
This invention relates to a flexible mounting support for a wafer scale integrated circuit and more particularly to such a support which allows for better heat dissipation required by the increased circuit density inherent therein.
2. Description of the Prior Art
Wafer scale integrated circuits provide the advantage that interconnection between the respective subcircuits can be formed at the time of the manufacture of the wafer, thereby reducing the number of handling steps involved in the present day practice of separating the individual subcircuits from the wafer for individual packaging. Furthermore, wafer scale integration accommodates faster switching speeds since the distances between the respective circuits are substantially lessened as are the number of interconnections and bonds, therefore accommodating less probability of defective interconnections and the requirement of smaller signal propagation times.
However, thermal design considerations have been a significant barrier to commercial implementation of wafer scale integration. Present day device densities on integrated circuit chips which have been separated from a parent wafer for individual packaging have an associated power density of something less than 10 watts per square centimeter. This density becomes approximately 0.125 watts per square centimeter when the individual chip is packaged and mounted on a printed circuit board. That is to say, individualized packaging and subsequent mounting on a printed circuit board provides a significant dilution of the power density. However, with wafer scale integration, where a large number of circuits are formed on the same substrate, the power density of 10 watts per square centimeter over a comparatively large area becomes significant. Furthermore, heat expansion and contraction of the wafer can result in buckling and cracking of the wafer, particularly if it is mounted on a rigid substrate.
Except in the case of dynamic RAMs where only a portion of the circuits are active at a time, thermal conduction, convection and radiation methods of heat dissipation are not adequate for maintaining the circuitry of a wafer scale integrated system at a temperature below that at which the circuits begin to go marginal. Improvements in heat transfer coefficients can be obtained by utilizing liquid boiling or nucleic boiling mechanisms which maintain the circuitry at a temperature only slightly higher than the boiling temperature of the liquid medium employed, normally about 10.degree. C. above the boiling temperature. In this manner, by choosing appropriate liquid medium and varying the pressure of the system, any operating temperature of the wafer scale integrated circuitry can be obtained. Such a nucleic boiling system is disclosed in the Pappas et al U.S. patent application, Ser. No. 119,046, filed Feb. 6, 1980 and assigned to the assignee of the present invention. However, it is still necessary to be able to have a mounting for the wafer scale integrated system which allows for expansion and contraction as well as much exposure of the wafer substrate to the cooling medium as possible.
It is, then, an object of the present invention to provide an improved mounting support for a wafer scale integrated circuit.
It is another object of the present invention to provide an improved flexible mounting support for a wafer scale integrated circuit which allows as much of the wafer substrate surfaces as possible to be exposed to a cooling medium.
It is still another object of the present invention to provide an improved flexible mounting support for a wafer scale integrated circuit which do not only allows for a maximum exposure of the substrate to the cooling medium but also to provide the appropriate power and signal connections as required by the circuitry on and in the wafer substrate.